Digital control circuit for stabilizing DC voltage

Abstract

The article presents an analysis of the operation of a digital control loop for stabilizing DC voltage, which utilizes a linear relationship between the duration of the pulse opening of the power-regulating element and the deviation of the output voltage from the nominal value. The design features and technical parameters of linear and pulse sequential DC voltage converters are analyzed. The study is based on the principle of operation of a step-down linear DC voltage stabilization system with pulse control. The work provides structural and functional diagrams of the development of the digital control loop for voltage stabilization. Simulation modeling of the proposed circuits was conducted in the Multisim software environment.
The digital control loop for DC voltage stabilization can be used in DC networks to en-sure a stable DC voltage for components involved in energy generation and storage. Changes in load conditions affect the voltage quality in the DC voltage stabilization system. Under such conditions, an effective digital control loop for DC voltage stabilization is necessary to ensure proper operation of voltage converters and automatic regulation of battery charging.
The research is based on the development of structural and functional diagrams of the digital control loop for DC voltage stabilization using a 4-bit or 8-bit digital-to-analog con-verter with current control and a reference voltage Vref = Vin.
Analysis of the simulation results of the impact of power supply voltage ripple on the output voltage of the digital DC voltage stabilization loop at various clock generator frequen-cies shows that, under ideal conditions (Vin = const), the ripple level is 332 mV. When the power supply voltage fluctuates within ±11.7% and the ratio of the ripple frequency at the load to the power supply voltage fluctuation frequency is 10:1, the ripple amplitude at the load is 1.24 V. Similarly, when the ratio of the ripple frequency at the load to the power supply voltage fluctuation frequency is 100:1, the ripple amplitude is 945 mV. Consequently, compared to ideal conditions, the ripple increases by a factor of 3.7 (1.24 V / 332 mV) at a frequency ratio of 10:1 and by a factor of 2.8 (945 mV / 332 mV) at a frequency ratio of 100:1.
Simulation modeling of the developed circuits demonstrated the expected results of voltage stabilization using the digital control loop. Specifically, a smooth startup was observed during the regulation of the output DC voltage with a low ripple level without the use of addi-tional filters. Additionally, through feedback, the output voltage is controlled, which eliminates the temperature and time drift of parameters typical of analog circuits.