ALGORITHM FOR SOFTWARE IMPLEMENTATION OF DESIGNING OVERVOLTAGE PROTECTION IN PHOTOVOLTAIC MODULES OF SOLAR ARRAYS USING A VARISTOR-POSISTOR STRUCTURE

The use of modern hardware and software design allows to effectively solve a number of problems associated with the development of various technical devices. The specificity of this approach is the development of algorithms with the capabilities of dynamic correction of the design process with the participation of the user. The algorithm of the software implementation of designing protection circuits against electrical overloads in photovoltaic modules of solar arrays using a voltage limiting device based on metal oxide varistor and posistor of the PolySwitch type being in thermal contact is described in this paper. The algorithm provides for determining the optimal technical parameters of the voltage limiting device (minimum resistance and tripping current of the posistor element, classification voltage and non-linearity coefficient of the varistor element) for the operation of photovoltaic module, which is in the state of lighting in the absence and presence of faulty, degraded, or shaded photovoltaic cells.

Introduction. Currently, solar arrays are one of the most popular renewable sources of electrical energy. The actual task in their further development is directly related to improving the reliability of their operation and service life.
One of the factors of unreliability of the solar battery is the presence of overvoltages inside its photovoltaic (PV) modules, which lead to the appearance of local heating regions ("hot spots") [1][2][3].
The PV module (solar panel) consists of series-connected PV cells that are divided into several submodules [4,5]. Each such submodule is equipped with a bypass diode, which is connected in parallel to it. If one or more PV cells reduces the photocurrent generated by them due to a malfunction or shadowing (such PV cells are called "bad"), then the bypass diode D provides ISSN 125 an alternative current path from other submodules. The voltage across the entire submodule coincides with the low voltage drop across the directly biased diode (less than 1 V) [6]), which corresponds to an almost short circuit of the considered submodule.
The lighted cells inside the submodule cannot transfer their generated photocurrents to the external electrical circuit, because the series connection contains a big resistance created by the "bad" cells. The voltage created by these PV cells shifts the p-n junction of the "bad" element in the reverse direction, and it operates as a load, and not as a generator. Energy dissipation on the indicated load leads to inhomogeneous heating of the module, in particular, to the appearance of local heating regions in it. The number of PV cells in the submodule must be small in order to prevent the voltage on the "bad" cell UR from exceeding the breakdown voltage of its reverse biased p-n junction Ub. If this is not done, then the PV cell will be heat up. High temperatures in local areas of PV cell can lead to the appearance of "hot spots". Thus, thermal breakdown of the p-n junction can occur as the cell temperature increases. In this case, the magnitude of the reverse voltage decreases, but does not increase with increasing current, and local thermal drift in time takes place. In this one-dimensional current channels are formed, which can lead to internal temperatures significantly exceeding 400 °C and damage to the PV cell [2]. "Hot spots" with or without thermal breakdown can lead to degradation and destruction of PV cells.
Problem statement. Among the circuitry means for protecting PV cells from overvoltages, one of the new approaches to the problem of protection against overvoltages of this type is the use of voltage limiting devices based on a varistor-posistor structure [7]. For its perspective implementation, it is necessary to justify and develop general schemes for using the solid-state structure under consideration to limit the constant overvoltages that occur in PV systems of solar arrays, as well as determine the requirements for their parameters. The most effective solution to this problem can be made using modern hardware and software design. Moreover, the specifics of applying the approach to the design of these systems is the development of algorithms with The algorithm of this kind for the software implementation of designing protection circuits against electrical overloads in PV modules of solar arrays using a varistor-posistor voltage limiting device based on metal oxide varistor and resettable fuse of the PolySwitch type being in thermal contact is described in this paper.
Main part.
1. Circuit representation of the implementation of overvoltage protection. As know, the implementation of overvoltage protection of an element of an electric circuit is realized by installing the corresponding voltage limiting device parallel to it [8,9]. This approach makes it possible to propose an electrical circuit for the protection of one or series connected PV cells from overvoltages in the submodule of PV module (Fig. 1).  When an input overvoltage is applied to such a structure, the current flowing through the varistor layer heats it. The heat dissipated by this varistor layer heats the posistor layer connected in series to it and leads to an increase in the resistance of this posistor layer. As a result, there is a redistribution of the input overvoltage between the layers. This ensures voltage limitation at a given value on the varistor layer (output voltage) and, therefore, on the load, which is connected in parallel with the varistor layer.
The project algorithm takes into account that PV cells have nonlinear current-voltage characteristics that depend on the level of solar radiation, ambient temperature and the features of the cell itself. Currently, there are several basic substitution schemes for PV cells, whose mathematical description is used in modern simulation [12][13][14].
The most well-known of them contains a photocurrent source (iph) and a parallel-connected diode (D) simulating a p-n junction, shunt resistor (rsh) SSN 1562-9945 (Print) ISSN 2707-7977 (Online) 128 simulating leakage currents, and series resistor (rs), which characterizes internal resistance of the cell and contacts (Fig. 3). rL is the load resistance for PV cell.

Figure 3 -Equivalent substitution scheme for PV cell
In the operating mode of the PV cell (directly biased photodiode) the leakage current is neglected, i.e. it is assumed that shunt resistance rsh tends to infinity. In accordance with this substitution schemes, the output current of the PV cells i can be determined [12,13] from the equation where A is the coefficient depending on the physical properties of materials and the p-n junction parameters (for silicon, it is assumed to be 1.2 -1.8 [12,15]); k is the Boltzmann constant; T is the absolute temperature of the PV cell; q is the electron charge; u is the output voltage of the PV cell; 0 i is the reverse current of the p-n junction diode.
In addition to the indicated physical parameters of the PV cells, the technical parameters are also used: is the short-circuit current of the PV cell (maximum current generated by the PV cell when its con- These parameters of the substitution scheme can be found from the current-voltage characteristics of PV cell [15,16,17].
The varistor must be in a state with high resistance, and thus it does not affect the operation of the PV cells.
-The resistance of the PPTC fuse in the conductive state RFu (determined by the passport values: the minimum initial resistance Rmin or the maximum resistance after one hour after tripping at a given ambient temperature R1max [18,19]) must be many times less than the equivalent series resistance of the PV cells section K⋅ rs s Fu where ISC=iSC is the short-circuit current of the PV submodule;  The parameters of the PV cells and its equivalent circuit used as the initial parameters of the considered algorithm are given in Table 1. 132 flow through the bypass diode D (diode is on), which short-circuits the submodule ( Fig. 1 and 4b). As a result, a situation is realized when all the generated voltage by the lighted PV cells will be shift the "bad" PV cell (or cells) in the reverse direction. If the voltage of the voltage limiting device Ulim is less than the total voltage generated by the lighted sections of the PV cells located outside the Section 1 with a "bad" PV cell E1=K⋅(M-1)⋅UF (Fig. 4b), i.e.
then the varistor will be heat up transferring heat to the fuse. With increasing voltage limiting device temperature to Ttrip, the fuse will be increase its resistance. As a result, the generated voltage E1 will be redistributed so that part of it will be drop on the high resistance of the PPTC fuse of the voltage limiting device, and the rest of the voltage (no more than Ulim) will be drop on Section 1.
In the presence of "bad" PV cells, the total shunt resistance of the "bad" PV cells, which is quite large (up to 10 4 Ohm [15]), is the load resistance of all series-connected lighted PV cells of the submodule. Thus, the following conditions hold: The equations for determining the magnitude of the voltage drop on the "bad" PV cells of the submodule in accordance with Fig. 4b where ( ) ( ) ( ) The equation for the heat balance of voltage limiting device, which also depends on these unknowns, can be written as follows where RT is the thermal resistance of the structure; As can be seen from Fig. 6a  It must be noted that if a section consists of several PV cells K>1 then the following restrictions must be fulfilled.
1. The voltage at a separate protected ("bad") PV cell must not exceed the breakdown voltage of its reverse biased p-n junction (Fig. 4b) The influence of the resistance of directly biased lighted PV cells is not taken into account in (12), because rs/rsh<<1.
The maximum number of PV cells in the section protected by one voltage limiting device can be obtained from the equation (13). Taking into account that the voltage generated by one PV cell is UF ≈0.56 V [15], the maximum number of PV cells in the section is 7, 10, and 7 when using varistor elements that provide the voltage of limiting Ulim equal to 4, 6 and 8 V, respectively. The highest voltage drop value on a "bad" PV cell occurs when it is alone in a circuit of series-connected lighted and serviceable PV cells.

Features of relaxation of voltage limiting device when renewing lighting of shaded PV cell.
In accordance with the concepts [22], when returning submodule of the PV module from partially shaded in a fully lighted state the transition of the resettable fuse to a highly conductive ("cold") state can occur only when its temperature decreases due to a decrease in the supplied electric power. The initial stage of this process is illustrated in Fig. 1.
When the submodule of the PV module is fully lighted, the varistor resistance becomes large (shown by an open switch) due to the fact that a small voltage is applied to it. This voltage is generated by one section of the PV cells and it is less than the classification voltage of the varistor. The thermal power dissipated by the varistor becomes insufficient to maintain the resettable fuse at the tripping temperature. As a result, the temperature of the resettable fuse decreases and its resistance decreases. In the analyzed situation, condition (4) must be satisfied, i.e. the current through the voltage limiting device must be less than the value of the tripping current of the resettable fuse element Itrip at the actual temperature of the posistor layer.
The heat balance equation for the posistor layer, which describes such a process of relaxation of the voltage limiting device, can be written as: where Relaxation of temperature and electrical resistance to their initial values (corresponding to the "cold" highly conductive state of the posistor) is possible only for voltage limiting devices that have small values of the thermal resistance of voltage limiting device RT (Fig. 7a, curves 1, 2, 3) and the electrical resistance of posistor layer in conducting state RFu0 (curves 1 and 2).
Relaxation is not observed at large values of indicated parameters. The algorithm can be used to develop the software application for modeling systems protection against overvoltages of the considered type at the stages of selecting the element base and describing the functioning of the modern cycle of computer-aided design technology.